There are three hirachies. The virtual design levels need to be mapped to the physically computing control levels which then need to be mapped to the physically producing assembly levels.
- design levels -> control levels -> assembly levels
This gives an extremely big design space.
Starting with very high level programming languages going down a decompression chain to low level signals.
- high language 1: functional, logical, connection to computer algebra system
- high language 2: imperative, functional
- constructiv esolid geometry graph (CSG graph), parametric surfaces
- quadrik nets C1
- triangle nets C0
- Primitive signals: step-signals, rail-switch-states, clutch-states, ...
Note that there is a second target for the decompression chain. In the development process. Virtual visualizations are necessary.
- Central computer
- semi local nanoelectronics
- local nanomechanics
The physical assembly process. Main article: Assembly levels