Compute architectures - Revision history

Apm: /* Related / added link to yet unwritten pages Future of coding Future of text * Human computer interactions

2024-09-09T11:03:43Z

Related: added link to yet unwritten pages * Future of coding Future of text * Human computer interactions

← Older revision		Revision as of 13:03, 9 September 2024
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	* [[Quantum computing]] (not to be covered here)		* [[Quantum computing]] (not to be covered here)
			* [[Future of coding]] [[Future of text]]
			* [[Human computer interactions]]

	== External links ==		== External links ==

Apm: /* Forth & concatenative programming related */

2024-09-08T10:21:32Z

Forth & concatenative programming related

← Older revision		Revision as of 12:21, 8 September 2024
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	== Forth & concatenative programming related ==		== Forth & concatenative programming related ==

	2009 – J1: a small Forth CPU Core for FPGAs <br>		2009 – '''J1: a small Forth CPU Core for FPGAs''' <br>
	ResearchGate: https://www.researchgate.net/publication/228489082_J1_a_small_Forth_CPU_Core_for_FPGAs <br>		ResearchGate: https://www.researchgate.net/publication/228489082_J1_a_small_Forth_CPU_Core_for_FPGAs <br>
	Direct link: https://excamera.com/files/j1.pdf <br>		Direct link: https://excamera.com/files/j1.pdf <br>

Apm: /* Dedicated compute hardware specifically designed for pure functional languages (lambda calculus) */ added a contemplative programming related architecture

2024-09-08T10:21:15Z

Dedicated compute hardware specifically designed for pure functional languages (lambda calculus): added a contemplative programming related architecture

← Older revision		Revision as of 12:21, 8 September 2024
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	* Associated proglang: https://github.com/HigherOrderCO/Bend		* Associated proglang: https://github.com/HigherOrderCO/Bend

	=== Older works - lambda calculus evaluating hardware ===		== Older works - lambda calculus evaluating hardware ==

	* https://en.wikipedia.org/wiki/Lisp_machine		* https://en.wikipedia.org/wiki/Lisp_machine
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	* https://en.wikipedia.org/wiki/CEK_Machine (based on SECD)		* https://en.wikipedia.org/wiki/CEK_Machine (based on SECD)
	{{wikitodo\|Add details (SECD)}}		{{wikitodo\|Add details (SECD)}}

			== Forth & concatenative programming related ==

			2009 – J1: a small Forth CPU Core for FPGAs <br>
			ResearchGate: https://www.researchgate.net/publication/228489082_J1_a_small_Forth_CPU_Core_for_FPGAs <br>
			Direct link: https://excamera.com/files/j1.pdf <br>
			Website: https://excamera.com/sphinx/index.html <br>

	== Green arrays (related to stack based programming) ==		== Green arrays (related to stack based programming) ==

Apm: /* External links */

2024-09-02T12:59:34Z

External links

← Older revision		Revision as of 14:59, 2 September 2024
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	* https://en.wikipedia.org/wiki/Neuromorphic_engineering		* https://en.wikipedia.org/wiki/Neuromorphic_engineering
	* https://en.wikipedia.org/wiki/Unconventional_computing (beyond the scope of this page)		* https://en.wikipedia.org/wiki/Unconventional_computing (beyond the scope of this page)
			* https://en.wikipedia.org/wiki/Differentiable_programming (drifting offtopic; {{wikitodo\|move link to other page, category theory?}})
	----		----
	* https://en.wikipedia.org/wiki/Fabric_computing		* https://en.wikipedia.org/wiki/Fabric_computing

Apm: /* External links */

2024-09-02T12:58:13Z

External links

← Older revision		Revision as of 14:58, 2 September 2024
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	* https://en.wikipedia.org/wiki/Very-large-scale_integration (VLSI)		* https://en.wikipedia.org/wiki/Very-large-scale_integration (VLSI)
	* https://en.wikipedia.org/wiki/Neuromorphic_engineering		* https://en.wikipedia.org/wiki/Neuromorphic_engineering
			* https://en.wikipedia.org/wiki/Unconventional_computing (beyond the scope of this page)
	----		----
	* https://en.wikipedia.org/wiki/Fabric_computing		* https://en.wikipedia.org/wiki/Fabric_computing

Apm: some typofixes

2024-09-02T12:57:23Z

some typofixes

Apm: /* Dedicated compute hardware specifically designed for pure functional languages (lambda calculus) */ added https://en.wikipedia.org/wiki/Lisp_machine

2024-09-02T12:44:52Z

Dedicated compute hardware specifically designed for pure functional languages (lambda calculus): added https://en.wikipedia.org/wiki/Lisp_machine

← Older revision		Revision as of 14:44, 2 September 2024
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	=== Older works - lambda calculus evaluating hardware ===		=== Older works - lambda calculus evaluating hardware ===

			* https://en.wikipedia.org/wiki/Lisp_machine
	* https://en.wikipedia.org/wiki/SECD_machine <br>The letters stand for Stack, Environment, Control, Dump—the internal registers of the machine.		* https://en.wikipedia.org/wiki/SECD_machine <br>The letters stand for Stack, Environment, Control, Dump—the internal registers of the machine.
	* https://en.wikipedia.org/wiki/CEK_Machine (based on SECD)		* https://en.wikipedia.org/wiki/CEK_Machine (based on SECD)

Apm: /* Misc */

2024-09-02T12:43:20Z

Misc

@@ Line 119: / Line 119: @@
 == Misc ==
-* Manchester Dataflow Machine, 1980s. – https://steveloughran.blogspot.com/2015/06/the-manchester-dataflow-machine-obscure.html
+* https://en.wikipedia.org/wiki/Transport_triggered_architecture
-* 1980 – SKIM - The S, K, I reduction machine – https://dl.acm.org/doi/10.1145/800087.802798
 == External links ==

Apm: /* Reversible computing architectures */ added lots of links to the stuff of – Robert Glück & Alexis De Vos

2024-09-02T12:26:36Z

Reversible computing architectures: added lots of links to the stuff of – Robert Glück & Alexis De Vos

@@ Line 89: / Line 89: @@
 * [https://www.cise.ufl.edu/research/revcomp/ RevComp - The Reversible and Quantum Computing Research Group] Pendulum fist fully adiabatic CPU
-Se also: [[Reversible computing]] & [[Well merging]]
+See also: [[Reversible computing]] & [[Well merging]]
 == Misc ==

Apm at 11:34, 2 September 2024

2024-09-02T11:34:12Z

← Older revision		Revision as of 13:34, 2 September 2024
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	This page is about compute architectures aimed for physical (on silicon) implementation. <br>		This page is about compute architectures aimed for physical (on silicon) implementation. <br>
	This page is not about various exotic computing substrates (not: https://en.wikipedia.org/wiki/Unconventional_computing) <br>		This page is not about various exotic computing substrates (not: [[Compute substrates]] like https://en.wikipedia.org/wiki/Unconventional_computing ) <br>
	This page is not about purely theoretical machines with no means of mapping them to an on chip design. <br>		This page is not about purely theoretical machines with no means of mapping them to an on chip design. <br>
	Although the lines can blur a bit on that. <br>		Although the lines can blur a bit on that. <br>
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	* [https://www.cise.ufl.edu/research/revcomp/ RevComp - The Reversible and Quantum Computing Research Group] Pendulum fist fully adiabatic CPU		* [https://www.cise.ufl.edu/research/revcomp/ RevComp - The Reversible and Quantum Computing Research Group] Pendulum fist fully adiabatic CPU
	Se also: [[Reversible computing]] & [[Well merging]]		Se also: [[Reversible computing]] & [[Well merging]]

			== Misc ==

			* Manchester Dataflow Machine, 1980s. – https://steveloughran.blogspot.com/2015/06/the-manchester-dataflow-machine-obscure.html
			* 1980 – SKIM - The S, K, I reduction machine – https://dl.acm.org/doi/10.1145/800087.802798

	== External links ==		== External links ==

← Older revision		Revision as of 14:57, 2 September 2024
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	This page is about compute architectures aimed for physical (on silicon) implementation. <br>		This page is about compute architectures aimed for physical (on silicon) implementation. <br>
	This page is not about various exotic computing substrates (~~not: [[Compute substrates]] like https://en~~.~~wikipedia.org/wiki/Unconventional_computing )~~ <br>		This page is not about various exotic computing substrates (such as those listed under 'Unconventional computing' on Wikipedia). <br>
	This page is not about purely theoretical machines with no means of mapping them to an on chip design. <br>		This page is not about purely theoretical machines with no means of mapping them to an on chip design. <br>
	Although the lines can blur a bit on that. <br>		Although the lines can blur a bit on that. <br>
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	These are usually not seen as practical general purpose compute architectures. <br>		These are usually not seen as practical general purpose compute architectures. <br>
	While some are Turing complete (e.g. ~~Conways~~ game of life) <br>		While some are Turing complete (e.g. Conway's game of life) <br>
	they seem not particularly suitable/practical for general purpose computations. <br>		they seem not particularly suitable/practical for general purpose computations. <br>

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	== Reversible computing architectures ==		== Reversible computing architectures ==

	* [https://www.cise.ufl.edu/research/revcomp/ RevComp - The Reversible and Quantum Computing Research Group] Pendulum ~~fist~~ fully adiabatic CPU		* [https://www.cise.ufl.edu/research/revcomp/ RevComp - The Reversible and Quantum Computing Research Group] Pendulum first fully adiabatic CPU
	See also: [[Reversible computing]] & [[Well merging]]		See also: [[Reversible computing]] & [[Well merging]]

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	https://dl.acm.org/doi/10.1145/800087.802798 <br>		https://dl.acm.org/doi/10.1145/800087.802798 <br>

	~~1082~~ – '''Wavefront Array Processor: Language, Architecture, and Applications''' <br>		1982 – '''Wavefront Array Processor: Language, Architecture, and Applications''' <br>
	https://ieeexplore.ieee.org/document/1675922 <br> (subset of systolic arrays) <br>		https://ieeexplore.ieee.org/document/1675922 <br> (subset of systolic arrays) <br>
	Wikipedia: "… Like SIMD machines, clocked systolic arrays compute in "lock-step" with each processor undertaking alternate compute \| communicate phases. But systolic arrays with asynchronous handshake between DPUs are called wavefront arrays. …"		Wikipedia: "… Like SIMD machines, clocked systolic arrays compute in "lock-step" with each processor undertaking alternate compute \| communicate phases. But systolic arrays with asynchronous handshake between DPUs are called wavefront arrays. …"
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	2002 – Executing a program on the MIT tagged-token dataflow architecture <br>		2002 – Executing a program on the MIT tagged-token dataflow architecture <br>
	https://ieeexplore.ieee.org/document/48862 <br>		https://ieeexplore.ieee.org/document/48862 <br>

			== Related ==

			* [[Quantum computing]] (not to be covered here)

	== External links ==		== External links ==

Compute architectures - Revision history

Apm: /* Related */ added link to yet unwritten pages * Future of coding Future of text * Human computer interactions

Apm: /* Forth & concatenative programming related */

Apm: /* Dedicated compute hardware specifically designed for pure functional languages (lambda calculus) */ added a contemplative programming related architecture

Apm: /* External links */

Apm: /* External links */

Apm: some typofixes

Apm: /* Dedicated compute hardware specifically designed for pure functional languages (lambda calculus) */ added https://en.wikipedia.org/wiki/Lisp_machine

Apm: /* Misc */

Apm: /* Reversible computing architectures */ added lots of links to the stuff of – Robert Glück & Alexis De Vos

Apm at 11:34, 2 September 2024

Apm: /* Related / added link to yet unwritten pages Future of coding Future of text * Human computer interactions